Key Dates Full Papers

Paper Submission Deadline

February 3rd February 10th, 2023 (AoE) (Extended)

Author Notification

March 24th, 2023 March 31st, 2023

Final Papers Due

April 7th, 2023 April 14th, 2023 (AoE)

Key Dates Posters

Paper Submission Deadline

March 5th, 2023 March 12th, 2023 (Extended)

Author Notification

March 17th, 2023 March 31st, 2023

Final Submissions Due

April 7th, 2023 April 14th, 2023


Submit your paper here

Download CFP

TXT Format | PDF Format



Previous Conferences

2022 2021, 2020, 2019, 2018, 2017, 2016, 2015, 2014, 2013, 2012, 2011, 2010, 2009, 2008, 2007, 2006, 2005, 2004


General Co-Chairs

Andrea Bartolini
University of Bologna, IT

Kristian Rietveld
Leiden University, NL

For more information, visit the website at

Program Overview

Tuesday May 9 Wednesday
May 10
May 11
09:00     09:00-10:00
Data Analytics
09:05 09:05-10:40
OpenHardware I
10:40 10:40-11:00
11:00   11:00-12:45
OpenHardware II
11:15   11:15-12:30
12:45 12:45-14:00
13:00 13:00-14:15
14:00   14:00-15:15
14:45   14:45-16:15
Mal-IoT I (Main Session)
15:15 15:15-16:30
16:15 16:15-16:45
16:45   16:45-17:45
Mal-IoT II (Panel)

Detailed Program

Tuesday May 9

    11:15-12:30 Session CompSecArch
    Chair: TBA
    Room: Aula Capitani
    Towards Fast and Scalable Private Inference
    Brandon Reagen
    FlexSEE: a Flexible Secure Execution Environment for protecting data-in-use
    Jose Moreira
    CoVE: Towards Confidential Computing on RISC-V Platforms
    Samuel Ortiz

    13:00-14:15 Lunch

    14:45-16:15 Session Mal-IoT I (Main Session)
    Chair: Francesco Regazzoni and Paolo Palmieri
    Room: Aula Capitani
    A Multithread AES Accelerator for Cyber-Physical Systems
    Francesco Ratto, Luigi Raffo and Francesca Palumbo
    Energy Consumption Evaluation of Post-Quantum TLS 1.3 for Resource-Constrained Embedded Devices
    George Tasopoulos, Charis Dimopoulos, Apostolos P. Fournaris, Raymond K. Zhao, Amin Sakzad and Ron Steinfeld
    Yes we CAN! Towards bringing security to legacy-restricted Controller Area Networks
    Wouter Hellemans, Md Masoom Rabbani, Bart Preneel and Nele Mentens
    New Seed Set Selection Method of the Scalable Method for Constructing Phylogenetic Trees
    Tianxiang He, Chansu Han, Akira Tanaka, Takeshi Takahashi and Jun'Ichi Takeuchi

    16:15-16:45 Break

    16:45-17:45 Session Mal-IoT II (Panel)
    Chair: Francesco Regazzoni and Paolo Palmieri
    Room: Aula Capitani
    Responsible computing

Wednesday May 10

    11:00-12:45 Session CompSpace
    Chair: Carsten Trinitis
    Room: Aula Capitani
    Increased Flexibility and Reliability for CubeSats through Distributed Telemetry and Control
    Sebastian Rueckerl and Martin J. Losekamm
    Exploration of Synthesis Methods from Simulink Models to FPGA for Aerospace Applications
    Serena Curzel, Michele Fiorito, Patricia Lopez Cueva, Tiago Jorge, Thanassis Tsiodras and Fabrizio Ferrandi
    Enabling Software Technologies for Critical COTS-based Spacecraft Systems
    Federico Reghenzani
    Machine Learning Application Benchmark
    Andreas Koch, Michael Petry, Max Ghiglione, Amir Raoofy, Gabriel Dax, Gianluca Furano, Martin Werner, Carsten Trinitis and Martin Langer
    Accelerated Deep-Learning inference on FPGAs in the Space Domain
    Michael Petry, Patrick Gest, Andreas Koch, Max Ghiglione and Martin Werner
    A Framework for Uniformly Analyzing and Mitigating Radiation-effects on FPGAs for Aerospace
    Luca Sterpone, Sarah Azimi, and Corrado de Sio
    Discussion & Conclusion

    12:45-14:00 Lunch

    14:00-15:15 Session EU I
    Chair: TBA
    Room: Aula Capitani
    LIGATE: LIgand Generator and portable drug discovery platform AT Exascale
    Gianluca Palermo
    Scalable Flow Simulations with the Lattice Boltzmann Method
    Jayesh Badwaik
    Exascale programing models for extreme data processing
    Francisco Javier Garcia-Blas
    Adaptive multi-tier intelligent data manager for exascale
    Francisco Javier Garcia-Blas

    15:15-16:30 Session CompilerFrontiers
    Chair: Serena Curzel
    Room: Aula Giorgio Prodi
    Invited talk: Application-Level Architecture Design
    John Leidel
    Clever DAE: Compiler Optimizations for Digital Twins at Scale
    Michele Scuttari, Nicola Camillucci, Daniele Cattaneo, Giovanni Agosta, Francesco Casella, Stefano Cherubin and Federico Terraneo
    Compiler-Injected SIHFT for Embedded Operating Systems
    Davide Baroffio and Federico Reghenzani

    15:15-16:30 Session EU II
    Chair: TBA
    Room: Aula Capitani
    Early Results of Mapping Industrial Applications on Heterogeneous HPC Systems - The OPTIMA Project
    Yannis Papaefstathiou
    VEDLIoT - Next generation accelerated AIoT systems and applications
    Pedro Trancoso
    DECICE: Device-Edge-Cloud Intelligent Collaboration Framework
    Julian Kunkel
    eProcessor - European, Extendable, Energy-Efficient, Extreme-Scale, Extensible, Processor Ecosystem
    Yannis Papaefstathiou

Thursday May 11

    09:00-10:00 Session Data Analytics
    Chair: Marco Minutoli and John Feo
    Room: Aula Giorgio Prodi
    Parallel Incremental Clustering Algorithms for Massive Dynamic Graphs
    Johannes Langguth
    Novel data and processing approaches for the development of hyper-distributed applications
    Francesc Lordan
    AGILE Workflows and Graphs
    John Feo

    09:05-10:40 Session OpenHardware I
    Chair: Davide Schiavone and Francesco Conti (Nusa Zidaric)
    Room: Aula Capitani
    HPDcache: Open-Source High-Performance L1 Data Cache for RISC-V Cores
    Implementation and Performance Evaluation Bit Manipulation Extension on CVA6 RISCV
    Holistic RISC-V Virtualization: CVA6-based SoC
    vRTLmod: An LLVM based Open-source Tool to Enable Fault Injection in Verilator RTL Simulations

    10:40-11:00 Break

    11:00-12:30 Session OpenHardware II
    Chair: Davide Schiavone and Francesco Conti (Nusa Zidaric)
    Room: Aula Capitani
    PERCIVAL: Deploying Posits and Quire Arithmetic into the CVA6 RISC-V Core
    X-HEEP: An Open-Source, Configurable and Extendible RISC-V Microcontroller
    An Open-Hardware Coarse-Grained Reconfigurable Array for Edge Computing
    SAT-MapIt: An Open Source Modulo Scheduling Mapper for Coarse Grain Reconfigurable Architectures
    Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber
    ErrorEval: an Open-Source Worst-Case-Error Evaluation Framework for Approximate Computing

    12:45-14:00 Lunch