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Key Dates Full Papers

Abstract Submission Deadline

January 28, 2021 (AoE)
January 21, 2021 (AoE)

Paper Submission Deadline

February 4, 2021 (AoE)
January 28, 2021 (AoE)

Author Notification

March 19, 2021
March 15, 2021

Final Papers Due

March 25, 2021


Submit your paper here

Download CFP

TXT Format | PDF Format

Download Call for EU Projects

TXT Format | PDF Format


Previous Conferences

2020, 2019, 2018, 2017, 2016, 2015, 2014, 2013, 2012, 2011, 2010, 2009, 2008, 2007, 2006, 2005, 2004


General Co-Chairs

Maurizio Palesi
University of Catania, IT
Antonino Tumeo
Pacific Northwest National Laboratory, USA

Program Co-Chairs

Georgios I. Goumas
National Technical University of Athens, GR
Carmen G. Almudever
Delft University of Technology, NL

For more information, visit the website at

Program Overview

Each day, the conference program starts at 15:30 CEST (UTC+2)

May 11
May 12
May 13
15:30 15:30-16:00
Modeling, decision making and
FPGA for HPC [Special Session #2]
16:00 16:00-16:45
ARM SVE for HPC [Special Session #1]
16:15 16:15-17:15
Novel Computing paradigms
16:30 (Break)
16:45 16:45-17:15
Computer Architecture
17:15 (Break) (Break) (Break)
17:30 17:30-18:30
Keynote 1
Keynote 2
EU Projects
18:15 (Break)
18:30 (Break) (Break) 18:30-19:15
Big Data [Special Session #3]
18:40 18:40-19:00
Workshop MAL-IoT
18:45 18:45-19:30
Edge Computing
19:00 19:00-19:45
Workshop Mal-IoT [live panel]
19:15 19:15-19:45
Award Ceremony and Closing

Detailed Program

Tuesday May 11

    15:30-16:00 Welcome

    16:00-16:45 Session ARM SVE for HPC [Special Session #1]
    Chair: Eishi Arima
    The European approach for the exascale age: the road to sovereignty. part 1: the European Context (Jean-Marc Denis). Part 2: Rhea, The European Microprocessor (Craig Prunty)
    Jean-Marc Denis and Craig Prunty
    Leveraging SVE for HPC workloads
    Fabrice Dupros
    SVE in LLVM
    Will Lovett
    Wisteria/BDEC-01 & h3-Open-BDEC: Innovative Scientific Computing in the Exascale Era
    Kengo Nakajima
    Performance Characteristics of A64FX Processor
    Mitsuhisa Sato
    Initial experiences with the Ookami A64FX testbed
    Andrew Burford, Alan C. Calder, David Carlson, Barbara Chapman, Firat Coşkun, Tony Curtis, Catherine Feldman, Robert J. Harrison, Yan Kang, Benjamin Michalowicz, Eric Raut, Eva Siegmann, Daniel G. Wood, Robert L. Deleon, Mathew Jones, Nikolay A. Simakov, Joseph P. White, and Dossay Oryspayev
    Performance Engineering using SVE Intrinsics on A64FX
    Robert J. Harrison
    Lessons Learned: An In-depth Look at Running FLASH on Ookami
    Alan C. Calder, Catherine Feldman, and Benjamin Michalowicz

    16:45-17:15 Session Computer Architecture
    Chair: Carsten Trinitis
    Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processors
    Francesco Daghero, Chen Xie, Daniele Jahier Pagliari, Alessio Burrello, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, and Massimo Poncino
    A Comparative Survey of Open-Source Application-Class RISC-V Processor Implementations
    Alexander Dörflinger, Mark Albers, Yejun Guan, Benedikt Kleinbeck, Harald Michalik, Raphael Klink, Chistopher Blochwitz, Anouar Nechi, and Mladen Berekovic
    Dynamic row activation mechanism for multi-core systems
    Tareq Alawneh, Raimund Kirner, and Catherine Menon

    17:15-17:30 Break

    17:30-18:30 Keynote 1
    Chair: Carmen G. Almudéver
    Quantum Computing: A Scalable, Systems Approach
    Anne Matsuura

    18:30-18:40 Break

    18:40-19:00 Session Workshop MAL-IoT
    Chair: Francesco Regazzoni
    On Resilience of Security-oriented Error Detecting Architectures Against Power Attacks: A Theoretical Analysis
    Osnat Keren and Ilia Polian
    A Threat Model Method for ICS Malware: the TRISIS case
    Yassine Mekdad, Giuseppe Bernieri, Mauro Conti, and Abdeslam El Fergougui
    Tapeout of a RISC-V Crypto Chip with Hardware Trojans: A Case-Study on Trojan Design and Pre-Silicon Detectability
    Alexander Hepp and Georg Sigl
    Fault Injection Attacks on SoftMax Function in Deep Neural Networks: Extended Abstract
    Dirmanto Jap, Yoo-Seung Won, and Shivam Bhasin

    19:00-19:45 Session Workshop Mal-IoT [live panel]
    Moderators: Francesco Regazzoni and Paolo Palmieri
    Panel: The ethic of things - The role of ethics in IoT security research
    Samuel Pagliarini, Georg T. Becker, Cees de Laat, Marc Witteman

Wednesday May 12

    15:30-16:30 Session Modeling, decision making and optimization
    Chair: John Feo
    DFShards: Effective Construction of MRCs Online for Non-stack Algorithms
    Ailing Yu, Yujuan Tan, Congcong Xu, Zhulin Ma, Duo Liu, and Xianzhang Chen
    Exploring the Potential of Context-Aware Dynamic CPU Undervolting
    Emmanouil Maroudas, Christos Antonopoulos, Nikolaos Bellas, and Spyros Lalis
    Diolkos: Improving ethernet throughput through dynamic port selection
    Oceane Bel, Joosep Pata, Jean-Roch Vlimant, Justas Balcas, Maria Spiropulu, and Nathan Tallent
    A Methodology and Framework for Software Memoization of Functions
    Pedro Pinto and João Cardoso
    Online Model Swapping for Architectural Simulation
    Patrick Lavin, Jeffrey Young, Richard Vuduc, and Jonathan Beard

    16:30-16:45 Break

    16:45-17:15 Session Dependability
    Chair: Hubertus Franke
    Near Real-time Intrusion Alert Aggregation Using Concept-based Learning
    Gordon Werner, S. Jay Yang, and Katie Mcconky
    ShuffleFL: Gradient-Preserving Federated Learning using Trusted Execution Environment
    Yuhui Zhang, Zhiwei Wang, Jiangfeng Cao, Rui Hou, and Dan Meng
    An Efficient Fault Tolerant Cloud Market Mechanism for Profit Maximization
    Boyu Li, Bin Wu, and Guangquan Xu

    17:15-17:30 Break

    17:30-18:30 Keynote 2
    Chair: Georgios Goumas
    Leveraging ML to Handle the Increasing Complexity of the Cloud
    Christina Delimitrou

    18:30-18:45 Break

    18:45-19:30 Session Edge Computing
    Chair: Vasileios Karakostas
    TEA-Fed: Time-Efficient Asynchronous Federated Learning for Edge Computing
    Chendi Zhou, Hao Tian, Hong Zhang, Jin Zhang, Mianxiong Dong, and Juncheng Jia
    Intelligent UAV-aided Controller Placement Scheme for Software-Defined Vehicular Networks
    Na Lin, Qi Zhao, and Liang Zhao
    An online guided tuning approach to run CNN pipelines on edge devices
    Pirah Noor Soomro, Mustafa Abduljabbar, Jeronimo Castrillon, and Miquel Pericas
    Performance Prediction for Convolutional Neural Networks on Edge GPUs
    Halima Bouzidi, Hamza Ouarnoughi, Smail Niar, and Abdessamad Ait El Cadi

Thursday May 13

    15:30-16:15 Session FPGA for HPC [Special Session #2]
    Chair: Catherine Graves
    Multi-FPGA Systems towards AI Acceleration and their Power Challenges
    Akram Ben Ahmed
    Near memory HPC accelerator design with FPGAs
    Maya B. Gokhale
    HPC Accelerator evolution: How to survive the Silurian extinction
    Utz-Uwe Haus
    Innovative Computing Architectures with Reconfigurable Devices
    Michaela Blott
    Scalable Stream Computing on FPGA Cluster
    Kentaro Sano and Tomohiro Ueno

    16:15-17:15 Session Novel Computing paradigms
    Chair: Sergi Abadal
    Design Space for Scaling-In General Purpose Computing within the DDR DRAM Hierarchy for Map-Reduce Workloads
    Siddhartha Balakrishna Rai, Anand Sivasubramaniam, Adithya Kumar, Prasanna Venkatesh Rengasamy, Vijaykrishnan Narayanan, Ameen Akel, and Sean Eilert
    On the role of system software in energy management of neuromorphic computing
    Twisha Titirsha, Shihao Song, Adarsha Balaji, and Anup Das
    Reducing quantum annealing biases for solving the graph partitioning problem
    Elijah Pelofske, Georg Hahn, and Hristo Djidjev
    A Golden Age for Computing Frontiers, a Dark Age for Computing Education?
    Christof Teuscher
    Scaling of Multi-Core Quantum Architectures: A Communications-Aware Structured Gap Analysis
    Santiago Rodrigo, Medina Bandic, Hans van Someren, Sergi Abadal, Eduard Alarcon, and Carmen G. Almudever

    17:15-17:30 Break

    17:30-18:15 Session EU Projects
    Chair: Masoumeh (Azin) Ebrahimi and Poona Bahrebar
    EVOLVE: HPC and Cloud Enhanced Testbed for Extracting Value from Large-scale Diverse Data
    Antony Chazapis, Jean-Thomas Acquaviva, Angelos Bilas, Georgios Gardikis, Christos Kozanitis, Stelios Louloudakis, Huy-Nam Nguyen, Christian Pinto, Arno Scharl, and Dimitrios Soudris
    Evolving 5G: ANIARA, an Edge-Cloud perspective
    Ian Marsh, Nicolae Paladi, Henrik Abrahamsson, Jonas Gustafsson, Johan Sjöberg, Andreas Johnsson, Pontus Sköldström, Jim Dowling, Paolo Monti, Melina Vruna, and Mohsen Amiribesheli
    The Italian research on HPC key technologies across EuroHPC
    Marco Aldinucci, Giovanni Agosta, Antonio Andreini, Claudio A. Ardagna, Andrea Bartolini, Alessandro Cilardo, Biagio Cosenza, Marco Danelutto, Roberto Esposito, William Fornaciari, Roberto Giorgi, Davide Lengani, Raffaele Montella, Mauro Olivieri, Sergio Saponara, Daniele Simoni, and Massimo Torquati
    Architecting More Than Moore – Wireless Plasticity for Massive Heterogeneous Computer Architectures (WiPLASH)
    Joshua Klein, Marina Zapater, Alexandre Levisse, Giovanni Ansaloni, David Atienza, Davide Rossi, Francesco Conti, Martino Dazzi, Kumudu Geethan Karunaratne, Irem Boybat, Abu Sebastian, Elana Pereira de Santana, Peter Haring Bolívar, Mohamed Saeed, Renato Negra, Zhenxing Wang, Kun-Ta Wang, Max Lemme, Akshay Jain, Robert Guirado, Hamidreza Taghvaee, and Sergi Abadal
    cREAtIve: Reconfigurable Embedded Artificial Intelligence
    Poona Bahrebar, Leon Denis, Maxim Bonnaerens, Kristof Coddens, Joni Dambre, Wouter Favoreel, Illia Khvastunov, Adrian Munteanu, Hung Nguyen-Duc, Stefan Schulte, Dirk Stroobandt, Ramses Valvekens, Nick Van den Broeck, and Geert Verbruggen
    When Wearable Technology Meets Computing in Future Networks: A Road Ahead
    Aleksandr Ometov, Nadezhda Chukhno, Olga Chukhno, Jari Nurmi, and Elena Simona Lohan

    18:15-18:30 Break

    18:30-19:15 Session Big Data [Special Session #3]
    Chair: Sumit Purohit
    Scalable Topological Data Analysis for Life Science Applications
    Ananth Kalyanaraman
    Graph Analytics in the Exascale Era
    Mahantesh Halappanavar
    Interactive Data Science at Scale
    David Bader
    AvesTerra: A framework for global-scale knowledge representation and analytic interoperability
    J. Smart
    Parallel Graph Algorithms by Block: From I/O to Algorithms
    Ümit Çatalyürek

    19:15-19:45 Award Ceremony and Closing